A typical semiconductor memory has a memory cell array divided into a plurality of sectors, so that there is no need of spontaneously reading all of data stored in memory cells assigned to each of word lines, reducing data accessing time. Transferring data in the unit of a sector makes the speed of data processing be enhanced and too causes load capacitance on bit lines and word lines to be reduced thereby. Therefore, a sector-divided nonvolatile memory is capable of programming and erasing more one sectors in response to external address signals. In a erase operation, external addresses involved in sectors to be erased are latched and then the sectors selected by the latched addresses are put into an erase mode in which sequential erasing operations sector by sector are conducted till all of the selected sectors have erased data. The addresses used in the sector erase operation internally are counted up from the external address.
The chart of FIG. 1 shows coding forms of addresses used for programming and erasing operations in a nonvolatile memory composed of 19 sectors. In order to select the 19 sectors, in addition to address signals of four bits for 16 sectors SA0.about.SA15, further three bits of address signals should be applied thereto for the rest of the sectors, SA16.about.SA18. As shown in FIG. 1, address signals A15.about.A18 are spent for selecting sectors SA0.about.SA15 and address signals A12.about.A14 for SA16.about.SA18. Address buffers having flip-flop circuits to select the sectors are in need of comprising additional flip-flop circuits for generating the additional sectors. However, an erase operation substantially does not need the address signals A12.about.A14 those are additionally provided for a programming operation. Since there is the same coding capacity between the programming and erasing, unnecessary logic components are consumed even in the erasing operation. Such coding capacity of the same would not cause the aforementioned problem when the number of sectors to be selected is just 2.sup.n for n-bit address signals, not being over the 2.sup.n.